Strategic value of information systems Essay Example | Topics and Well Written Essays - 2000 words

Strategic value of information systems - Essay Example The ultimate goal of Information Systems Management is to assimilate the utilization of information technology into business models and business processes to scrutinize its potential to attain business goals. Todays in the scenario of globalize market, which is full of large enterprises; the competition is getting tougher and tougher. As a result, IT departments are ponderous to become more aligned with business. There are lot of models for calculating the profitability with the incorporation of information technology but they all are trying to explore the conjunction between IT investments and the company's financial result .The process of introducing and use of new information technology in organizations is based on the skills and knowledge of experts who has the ability to master a series of interdisciplinary skills. Other factors like organizing and managing human resources, long term planning, employment, training, motivation, encouraging creative work and proper stimulating are also significant. Psycho-sociological and managing processes also depend on the working conditions, type of work and area of work, availability of human resources and skills available, working atmosphere, and other factors. It is imperative that the development of information technology department is the responsibility of information technology management and should offer the effective ways and leadership qualities to manage the human resources efficiently. Following are the issues that executives must consider, examine and evaluate while making decisions regarding the strategic value of information systems. Business And Knowledge Management Organizations are facing ever-increasing challenges, brought on by marketplace pressures or the nature of the workplace. Many organizations are now looking to knowledge management to address these challenges. Such initiatives are often started with the development of a knowledge management strategy. To be successful, a KM strategy must denominate the basic necessities and issues within the organization, and furnish the architecture for incorporating all these factors. Every organization has a specific environment and different set of requirements, signified by various factors like size of organization, its aim and activities of the organization, overall strategic direction, accessibility of resources, geographical situations and many others. As a result knowledge management strategies follow either top-down or bottom up approach for the organizations. This main emphasis of these strategies is to provide the architecture for the selection and prioritization of individual projects and activities. Again this strategic focus depend on the number of factors that include: Organizational strategy documents, such as the corporate plan or annual report Involvement of Senior management Results of other strategic research projects, such as staff satisfaction surveys. External market research. 2. Psychological Factors According to psychological aspect factors that leveraged factors of IT development are as follows: Professional contributions of each individual Level of personal professional development and satisfaction at work Communication whether formal or informal, also plays significant role in the development of

VLSI Design and Embedded Systems

VLSI Design and Embedded Systems CHAPTER 1 INTRODUCTION 1.1 Motivation Phase locked loop (PLL) [1-3] is the heart of the many modern electronics as well as communication system. Recently plenty of the researches have conducted on the design of phase locked loop (PLL) circuit and still research is going on this topic. Most of the researches have conducted to realize a higher lock range PLL with lesser lock time [4] and have tolerable phase noise. The most versatile application of the phase locked loops (PLL) is for clock generation and clock recovery in microprocessor, networking, communication systems, and frequency synthesizers. Phase locked-loops (PLLs) are commonly used to generate well-timed on-chip clocks in high-performance digital systems. Modern wireless communication systems employ Phase Locked Loop (PLL) mainly for synchronization, clock synthesis, skew and jitter reduction [5]. Phase locked loops find wide application in several modern applications mostly in advance communication and instrumentation systems. PLL being a mixed signal circuit i nvolves design challenge at high frequency. Since its inspection in early 1930s, where it was used in the synchronization of the horizontal and vertical scans of television, it has come to an advanced form of integrated circuit (IC). Today found uses in many other applications. The first PLL ICs were available around 1965; it was built using purely analog component. Recent advances in integrated circuit design techniques have led to the development of high performance PLL which has become more economical and reliable. Now a whole PLL circuit can be integrated as a part of a larger circuit on a single chip. There are mainly five blocks in a PLL. These are phase frequency detector (PFD), charge pump (CP), low pass loop filter (LPF), voltage controlled oscillator (VCO) and frequency divider. Presently almost all communication and electronics devices operate at a higher frequency, so for that purpose we need a faster locking PLL. So there are a lot of challenges in designing the mentioned different blocks of the PLL to operate at a higher frequency. And these challenges motivated me towards this research topic. In this work mainly the faster locking of the PLL is concentrated by properly choosing the circuit architectures and parameters. The optimization of the VCO circuit is also carried out in this work to get a better frequency precision. 1.2 Organization of Thesis Before going into the details of the PLL, the motivation behind this work is mentioned in the Chapter 1 of the thesis. Chapter 2 briefly describes the whole PLL system. An introduction to the PLL circuit is mentioned in the section 2.1. Section 2.2 contains the detail architecture of the whole PLL system. Different types of PLLs are mentioned in the section 2.3. Section 2.4 explains the basic terms used in the PLL system while the consecutive sections give the details about the noise and application of the PLL. Chapter 3 builds the concepts of optimization. Definition of optimization technique and different circuit optimization techniques are presented in section 3.1 and 3.2 respectively. Section 3.3 gives the brief outline of the concept of geometric programming and convex optimization. The optimization of the CSVCO circuit is explained in section 3.4. The design and synthesis of the PLL is described in Chapter 4. The different design environments used in this work is mentioned in the section 4.1. The adopted design procedure is explained in section 4.2. Section 4.3 gives the design specifications and parameters of the work. The simulation results of the different circuits used in the PLL are depicted in the different sections of the Chapter 5. The performance of the CSVCO designed using convex optimization is compared with that of the traditional method in section 5.3. Section 5.5 gives the different simulation results of the PLL and its performance comparison between schematic and post layout level. At last Chapter 6 provides the conclusion that inferred from the work. CHAPTER 2 PHASE LOCKED LOOP 2.1 Introduction A PLL is a closed-loop feedback system that sets fixed phase relationship between its output clock phase and the phase of a reference clock. A PLL is capable of tracking the phase changes that falls in this bandwidth of the PLL. A PLL also multiplies a low-frequency reference clock CKref to produce a high-frequency clock CKout this is known as clock synthesis. A PLL has a negative feedback control system circuit. The main objective of a PLL is to generate a signal in which the phase is the same as the phase of a reference signal. This is achieved after many iterations of comparison of the reference and feedback signals. In this lock mode the phase of the reference and feedback signal is zero. After this, the PLL continues to compare the two signals but since they are in lock mode, the PLL output is constant. The basic block diagram of the PLL is shown in the Figure 2.1. In general a PLL consists of five main blocks: Phase Detector or Phase Frequency Detector (PD or PFD) Charge Pump (CP) Low Pass Filter (LPF) Voltage Controlled Oscillator (VCO) Divide by N Counter The â€Å"Phase frequency Detector† (PFD) is one of the main parts in PLL circuits. It compares the phase and frequency difference between the reference clock and the feedback clock. Depending upon the phase and frequency deviation, it generates two output signals â€Å"UP† and â€Å"DOWN†. The â€Å"Charge Pump† (CP) circuit is used in the PLL to combine both the outputs of the PFD and give a single output. The output of the CP circuit is fed to a â€Å"Low Pass Filter† (LPF) to generate a DC control voltage. The phase and frequency of the â€Å"Voltage Controlled Oscillator† (VCO) output depends on the generated DC control voltage. If the PFD generates an â€Å"UP† signal, the error voltage at the output of LPF increases which in turn increase the VCO output signal frequency. On the contrary, if a â€Å"DOWN† signal is generated, the VCO output signal frequency decreases. The output of the VCO is then fed back to the PFD in or der to recalculate the phase difference, and then we can create closed loop frequency control system. 2.2 PLL Architecture The architecture of a charge-pump PLL is shown in Figure 2.2. A PLL comprises of several components. They are (1) phase or phase frequency detector, (2) charge pump, (3) loop filter, (4) voltage-controlled oscillator, and (5) frequency divider. The functioning of each block is briefly explained below. 2.2.1 Phase Frequency Detector The â€Å"Phase frequency Detector† (PFD) is one of the main part in PLL circuits. It compares the phase and frequency difference between the reference clock and the feedback clock. Depending upon the phase and frequency deviation, it generates two output signals â€Å"UP† and â€Å"DOWN†. Figure 2.3 shows a traditional PFD circuit. If there is a phase difference between the two signals, it will generate â€Å"UP† or â€Å"DOWN† synchronized signals. When the reference clock rising edge leads the feedback input clock rising edge â€Å"UP† signal goes high while keeping â€Å"DOWN† signal low. On the other hand if the feedback input clock rising edge leads the reference clock rising edge â€Å"DOWN† signal goes high and â€Å"UP† signal goes low. Fast phase and frequency acquisition PFDs [6-7] are generally preferred over traditional PFD. 2.2.2 Charge Pump and Loop Filter Charge pump circuit is an important block of the whole PLL system. It converts the phase or frequency difference information into a voltage, used to tune the VCO. Charge pump circuit is used to combine both the outputs of the PFD and give a single output which is fed to the input of the filter. Charge pump circuit gives a constant current of value IPDI which should be insensitive to the supply voltage variation [8]. The amplitude of the current always remains same but the polarity changes which depend on the value of the â€Å"UP† and â€Å"DOWN† signal. The schematic diagram of the charge pump circuit with loop filter is shown in the Figure 2.4. When the UP signal goes high M2 transistor turns ON while M1 is OFF and the output current is IPDI with a positive polarity. When the down signal becomes high M1 transistor turns ON while M2 is OFF and the output current is IPDI with a negative polarity. The charge pump output current [3] is given by IPDI=IPUMP—IPUMP4Ï€Ãâ€"ΔÎ ¦ =2IPUMP4Ï€Ãâ€"ΔÎ ¦ =IPUMP2Ï€Ãâ€"ΔÎ ¦ =KPDIÃâ€"ΔÎ ¦ (1) Where KPDI=IPUMP2Ï€ (amps/radian) (2) The passive low pass loop filter is used to convert back the charge pump current into the voltage. The filter should be as compact as possible [9].The output voltage of the loop filter controls the oscillation frequency of the VCO. The loop filter voltage will increase if Fref rising edge leads Fin rising edge and will decrease if Fin rising edge leads Fref rising edge. If the PLL is in locked state it maintains a constant value. The VCO input voltage is given by Vinvco = KF Ãâ€" IPDI (3) Where KF is the gain of the loop filter. 2.2.3 Voltage Controlled Oscillator An oscillator is an autonomous system which generates a periodic output without any input. The most popular type of the VCO circuit is the current starved voltage controlled oscillator (CSVCO). Here the number of inverter stages is fixed with 5. The simplified view of a single stage current starved oscillator is shown in the Figure 2.5. Transistors M2 and M3 operate as an inverter while M1 and M4 operate as current sources. The current sources, Ml and M4, limit the current available to the inverter, M2 and M3; in other words, the inverter is starved for current. The desired center frequency of the designed circuit is 1GHz with a supply of 1.8V. The CSVCO is designed both in usual manner as mentioned in [3], [10, 11]. The general circuit diagram of the current starved voltage controlled oscillator is shown in the Figure 2.6. To determine the design equations for the CSVCO, consider the simplified view of VCO in Figure 2.5. The total capacitance on the drains of M2 and M3 is given by Ctot=52Cox(LpWp+LnWn) (4) The time it takes to charge Ctot from zero to VSP with the constant current ID4 is given by t1=VSPID4Ãâ€"Ctot (5) While the time it takes to discharge Ctot from VDD to VSP is given by t1=VDD-VSPID1Ãâ€"Ctot (6) If we set ID4= ID1=ID then the sum of t1 and t2 is given by t1+t2=VDDIDÃâ€"Ctot (7) The oscillation frequency of CSVCO for N number of stage is fosc=1Nt1+t2=IDNCtotVDD (8) This is equal to fcenter when Vinvco=VDD2 (9) The gain of the VCO is given by KVCO=fmax-fminVmax-Vmin HzV (10) 2.2.4 Frequency Divider The output of the VCO is fed back to the input of PFD through the frequency divider circuit. The frequency divider in the PLL circuit forms a closed loop. It scales down the frequency of the VCO output signal. A simple D flip flop (DFF) acts as a frequency divider circuit. The schematic of a simple DFF based divide by 2 frequency divider circuit is shown in the Figure 2.7. 2.3 Types of PLL There are mainly 4 types of PLL are available. They are . Liner PLL Digital PLL All Digital PLL Soft PLL 2.4 Terms in PLL 2.4.1 Lock in Range Once the PLL is in lock state what is the range of frequencies for which it can keep itself locked is called as lock in range. This is also called as tracking range or holding range. 2.4.2 Capture Range When the PLL is initially not in lock, what frequency range can make PLL lock is called as capture range. This is also known as acquisition range. This is directly proportional to the LPF bandwidth. Reduction in the loop filter bandwidth thus improves the rejection of the out of band signals, but at the same time the capture range decreases, pull in time becomes larger and phase margin becomes poor. 2.4.3 Pull in Time The total time taken by the PLL to capture the signal (or to establish the lock) is called as Pull in Time of PLL. It is also called as Acquisition Time of PLL. 2.4.4 Bandwidth of PLL Bandwidth is the frequency at which the PLL begins to lose the lock with reference. 2.5 Noises in PLL The output of the practical system deviates from the desired response. This is because of the imperfections and noises in the system. The supply noise also affects the output noise of the PLL system [12]. There are mainly 4 types of noises. They are explained below. 2.5.1 Phase Noise The phase fluctuation due to the random frequency variation of a signal is called as phase noise. This is mostly affected by oscillators frequency stability. The main sources of the phase noise in PLL are oscillator noise [12-15], PFD and frequency divider circuit. The main components of the phase noise are thermal and flicker noise. 2.5.2 Jitter A jitter is the short term-term variations of a signal with respect to its ideal position in time [16-19]. This problem negatively impacts the data transmission quality. Jitter and phase noise are closely related and can be computed one from another [18]. Deviation from the ideal position can occur on either leading edge or trailing edge of signal. Jitter may be induced and coupled onto a clock signal from several different sources and is not uniform over all frequencies. Excessive jitter can increase bit error rate (BER) of communication signal [19]. In digital system Jitter leads to violation in time margins, causing circuits to behave improperly. 2.5.3 Spur Non-desired frequency content not related to the frequency of oscillation and its harmonics is called as â€Å"Spur†. There are mainly two types of spur. They are reference spur and fractional spur. Reference spur comes into picture in an integer PLL while fractional spur plays a major role in fractional PLL. When the PLL is in lock state the phase and frequency inputs to the PFD are essentially equal. There should not be any error output from the PFD. Since this can create problem, so the PFD is designed such that, in the locked state the current pulses from the CP will have a very narrow width as shown in the Figure 2.9. Because of this the input control voltage of the VCO is modulated by the reference signal and thus produces â€Å"Reference Spur† [20]. 2.5.4 Charge Pump Leakage Current When the CP output from the synthesizer is programmed to the high impedance state, in practice there should not be any current flow. But in practical some leakage current flows in the circuit and this is known as â€Å"charge pump leakage current† [20]. 2.6 Applications of PLL The demand of the PLL circuit increases day by day because of its wide application in the area of electronics, communication and instrumentation. The recent applications of the PLL circuits are in memories, microprocessors, hard disk drive electronics, RF and wireless transceivers, clock recovery circuits on microcontroller boards and optical fiber receivers. Some of the PLL applications are mentioned below. 1. Frequency Synthesis A frequency synthesizer is an electronic system for generating a range of frequencies from a single fixed time base or oscillator. 2. Clock Generation Many electronic systems include processors of various sorts that operate at hundreds of megahertz. Typically, the clocks supplied to these processors come from clock generator PLLs, which multiply a lower-frequency reference clock (usually 50 or 100 MHz) up to the operating frequency of the processor. The multiplication factor can be quite large in cases where the operating frequency is multiple GHz and the reference crystal is just tens or hundreds of megahertz. 3. Carrier Recovery (Clock Recovery) Some data streams, especially high-speed serial data streams (such as the raw stream of data from the magnetic head of a disk drive), are sent without an accompanying clock. The receiver generates a clock from an approximate frequency reference, and then phase-aligns to the transitions in the data stream with a PLL. This process is referred to as clock recovery. 4. SkewReduction This is one of the very popular and earliest uses of PLL. Suppose synchronous pair of data and clock lines enter a large digital chip. Since clock typically drives a large number of transistors and logic interconnects, it is first applied to large buffer. Thus, the clock distributed on chip may suffer from substantial skew with respect to data. This is an undesirable effect which reduces the timing budget for on-chip operations. 5. Jitter and Noise Reduction One desirable property of all PLLs is that the reference and feedback clock edges be brought into very close alignment. The average difference in time between the phases of the two signals when the PLL has achieved lock is called the static phase offset. The variance between these phases is called tracking jitter. Ideally, the static phase offset should be zero, and the tracking jitter should be as low as possible. CHAPTER 3 CONVEX OPTIMIZATION OF VCO IN PLL 3.1 What is an optimization technique? Optimization technique is nothing but the finding of the action that optimizes i.e. minimizes or maximizes the result of the objective function. Optimization technique is applied to the circuits aiming at finding out the optimized circuit design parameter to achieve either the best performance or the desired performance. Optimization techniques are a set of most powerful tools that are used in efficiently handling the design resources and there by achieve the best result. Mainly optimization techniques are applied to the circuit for the selection of the component values, devices sizes, and value of the voltage or current source. 3.2 Types of circuit optimization method There are mainly four types of circuit optimization methods exist. They are Classical optimization Knowledge based optimization Global optimization method Convex optimization and geometric programming 3.2.1 Classical Optimization Methods: In case of analog circuit CAD, classical optimization methods [21], such as steepest descent, sequential quadratic programming, and Lagrange multiplier methods are mainly used. These methods are used with more complicated circuit models, including even full SPICE simulations in each iteration. This method can handle a wide variety of problem. For this there is a need of a set of performance measures and computation of one or more derivatives. The main disadvantage of the classical optimization methods is that the global optimal solution is not possible. This method fails to find a feasible design even one exist. This method gives only the local minima instead of global solution. Since many different initial designs are considered to get the global optimization, the method becomes slower. Because of the human intervention (to give â€Å"good† initial designs), the method becomes less automated. The classical methods become slow if complex models are used. 3.2.2 Knowledge-Based Methods: Knowledge-based and expert-systems methods such as genetic algorithm or evolution systems, systems based on Fuzzy logic, and heuristics-based systems have also been widely used in analog circuit CAD [21]. In case of knowledge based methods, there are few limitations on the types of problems, specifications, and performance measures that are to be considered. These methods do not require the computation of the derivatives. This is not possible to find a global optimal design solution using these methods. The final design is decided on the basis of the initial design chosen and the algorithm parameters. The disadvantage of the knowledge based methods is that they simply fail to find a feasible solution even when one may exist. There is a need of human intervention during the design and the training process. 3.2.3 Global Optimization Methods: Global optimization methods such as branch and bound and simulated annealing are also used in analog circuit design [21]. These methods are guaranteed to find the global optimal design solution. The global optimal design is determined by the branch and bound methods unambiguously. In each iteration, a suboptimal feasible design and also a lower bound on the achievable performance is maintained by this method. This enables the algorithm to terminate non-heuristically, i.e., with complete confidence that the global design has been found within a given tolerance. The branch and bound method is extremely slow, with computation growing exponentially with problem size. The trapping in a locally optimal design can be avoided by using simulated annealing (SA). This method can compute the global optimal solution but not guaranteed. Since there is no real-time lower bound is available, so termination is heuristic. This method can also handle a wide variety of performance indices and objects. T he main advantage of SA is that it handles the continuous variables and discrete variables problems efficiently and reduces the chances of getting a non-globally optimal design. The only problem with this method is that it is very slow and can not guarantee a global optimal solution. 3.2.4 Convex Optimization and Geometric Programming Methods: Geometric programming methods are special optimization problems in which the objective and constraint functions are all convex [22-24]. Convex optimization technique can solve the problems having a large number of variables and constraints very efficiently [22]. The main advantage of this method for which people generally adopt is that the method gives the global solution. Infeasibility is unambiguously detected. Since a lower bound on the achievable performance is given, so the method uses a completely non- heuristic stopping criterion. 3.3 Geometric programming and convex optimization Geometric programming is a special type of optimization technique in which all the objective must be convex. Before applying this technique it has to confirm that whether the given problem is convex optimization problem or not. Convex optimization problem means the problem of minimizing a convex function subject to convex inequality constraints and linear equality constraints. In IC integration convex optimization and geometric programming has become a more efficient computational tool for optimization purpose. This method has an ability to handle thousands of variables and constraints and solve efficiently. The main advantage of convex optimization technique is that it gives the global optimized value and the robust design. The fact that geometric programs can be solved very efficiently has a number of practical consequences. For example, the method can be used to simultaneously optimize the design of a large number of circuits in a single large mixed-mode integrated circuit. The de signs of the individual circuits are coupled by constraints on total power and area, and by various parameters that affect the circuit coupling such as input capacitance, output resistance, etc. Convex optimization is used to find out the optimized value of these parameter and sizing of the devices in the circuit [25]. Another application is to use the efficiency to obtain robust designs i.e., designs that are guaranteed to meet a set of specifications over a variety of processes or technology parameter values. This is done by simply replicating the specifications with a (possibly large) number of representative process parameters, which is practical only because geometric programs with thousands of constraints are readily solved. A real valued function fx defined on an interval (space) is called convex if ftx1+1-tx2≠¤tfx1+1-tfx2 (11) For every t,0 In the Figure 3.1 function fx is represented as a convex function on an interval. The convex optimization problem is in the form of minimize f0x Subjected to fix≠¤1 , i=1, 2, 3†¦, m gix=1 , i=1, 2, 3†¦, p xi>1 , i=1, 2, 3†¦, n Where fix is a posynomial function gix is a monomial function Let x1,x2†¦Ã¢â‚¬ ¦xn be n real positive variables. We can denote the vector (xi,xi†¦Ã¢â‚¬ ¦.xi) of these variables asx. A function f is called a posynomial function of x if it has the form fix1,x2†¦Ã¢â‚¬ ¦xn=k=1tCkx1ÃŽ ±1kx2ÃŽ ±2k†¦..xnÃŽ ±nk (12) Where Cj≠¥0 and ÃŽ ±ij à Ã‚ µ R. The coefficients Cj must be nonnegative but the exponents ÃŽ ±ij can be any real numbers including negative or fractional. When there is exactly one nonzero term in the sum i.e. t=1 and C1>0, we call f is a monomial function. 3.3.1 Advantages:  § Handle thousands of variables and constraints and solve efficiently.  § Global optimization can be obtained. 3.3.2 Disadvantages: * Strictly limited to types of problems, performance specification and objectives that can be handled. 3.4 Optimization of the VCO circuit In my earlier design of the VCO circuit, the sizes of all the five inverter stages are same. Now the convex optimization technique is applied to find out the optimal scaling ratio of the different inverter stages to get the optimal design with a better performance. There are 5 inverter stages and the design has to give a delay of 100ps. The load capacitance of the VCO circuit is 65 fF. All these design constraints are formulated and applied to the convex optimization technique. Mainly optimization techniques are applied for selection of component values and transistor sizing. In this work I have used the geometric programming technique to find out the optimized scaling ratio of the different stages in CSVCO to meet the desired center frequency with lesser deviation. Let xi is the scaling ration of the ith stage, CL is the load capacitance, and D is the total delay of the inverter stages then optimization problem is in the form of Minimize sum (xi) Subjected to CL≠¤CLmax D≠¤Dmax Where CLmax and Dmax are required design parameters and has a constant value. CHAPTER 4 DESIGN AND SYNTHESIS OF PLL 4.1 Design Environment The schematic level design entry of the circuits is carried out in the CADENCE Virtuoso Analog Design Environment. The layout of the PLL is designed in Virtuoso XL using GPDK090 library. In order to analyze the performances, these circuits are simulated in the Spectre simulator of CADENCE tool. Different performance indices such as phase noise, power consumption and lock time are measured in this environment. Transient, parametric sweep and phase noise analyses are carried out in this work to find out the performances of the circuit. The optimization of the current starved VCO circuit, the scale factor for transistor sizing is found out using the MATLAB environment. 4.2 Design Procedure 4.2.1 VCO Design Since VCO is the heart of the whole PLL system, it should be designed in a proper manner. The design steps for the current starved VCO are as follows. Step 1 Find the value of the propagation delay for each stage of the inverter in the VCO circuit using the following equation. Ï„p=1Nf (13) Where Ï„p= Ï„phl= Ï„plh= half of the propagation delay time of the inverter N= no of inverter stages f= required center frequency of oscillation Step 2 Find the WL ratio for the transistors in the different inverter stages using the equation in below. WL n=CloadÏ„phl µnCoxVdd-VT,n2VT,nVdd-VT,n+ln4Vdd-VT,nVdd-1 (14) WL p=CloadÏ„plh µpCoxVdd-VT,p2VT,pVdd-VT,p+ln4Vdd-VT,pVdd-1 (15) Step 3 After finding the WL ratio, find the values for W and L. Step 4 Find the value of the total capacitance form the expression Ctot=52Cox(LpWp+LnWn) (16) Where Cox is the oxide capacitance Lp,Wp,Ln,Wn is the width and length of the PMOS and NMOS transistors in the inverter stages. Step 5 Calculate the value of drain current for the center frequency which is given by IDcenter=NCtotVddf (17) Step 6 Find the WL ratio for the current starving transistors in the circuit from the drain current expression which is represented as WL n=2Ãâ€"IDcenter µnCoxVgs-VT,n2 (18) Similarly WL p=2.5Ãâ€"WL n (19) 4.2.2 Design of Phase Locked Loop The value of the charge pump current and the component parameters of the loop filter play a major role in the design of the phase locked loop circuit. The value of the lock time mainly depends upon these parameters. So while designing the circuit proper care should be taken in calculating these parameters. For the given values of reference(Fref) and output frequency(Fout) as well as the lock in range, the following steps to be carried out in designing the filter circuit. Step 1 Find the value of the divider circuit to be used which is given by n=FoutFref (20) Step 2 Find the value of the natural frequency (ωn) from the lock in range as given below lock in range=2Ãâ€"ÃŽ ¾Ãƒâ€"ωn (21) Step 3 Find the value of the charge pump gain (KPDI) from the charge pump current used in the circuit which is given by KPDI=Ipump2Ï€ (Amps/radian) (22) Step 4 Find the value of the gain of the VCO (Kvco) circuit from the characteristics curve using the following expression. Kvco=fmax-fminVmax-Vmin (Hz/V) (23) Step 5 Find the values of the loop filter component parameters using the following expressions. C1=KPDIÃâ€"KvcoNωn2 (24) C2=C110 (25) R=2ÃŽ ¾Ãâ€°nC1 (26) 4.3 Design Specifications and Parameters 4.3.1 VCO Design Specification The current starved VCO design specifications are mentioned in the following table. Table 1 VCO design specifications 4.3.2 VCO Design Parameters Table 2 List of design parameters of the CSVCO circuit 4.3.3 PLL Design Parameters The whole PLL system design specifications and parameters are shown in the Table 3. Parameter Value Reference frequency((Fref) 500 MHz output frequency(Fout) 1 GHz Lock in range 100 MHz

Aqutic Life :: essays research papers

Plants are critical to other life on this planet because they form the basis of all food webs. Most plants are autotrophic, creating their own food using water, carbon dioxide, and light through a process called photosynthesis. Some of the earliest fossils found have been aged at 3.8 billion years. These fossil deposits show evidence of photosynthesis, so plants, or the plant-like ancestors of plants, have lived on this planet longer that most other groups of organisms. At one time, anything that was green and that wasn’t an animal was considered to be a plant. Now, what were once considered â€Å"plants† are divided into several kingdoms: Protista, Fungi, and Plantae. Most aquatic plants occur in the kingdoms Plantae and Protista. It is believed that the earth was originally an aggregation of dust and swirling gases about 4.5 billion years ago. The earliest fossil life forms are 3.8 billion years old and contain simple prokaryotic (without a membrane-bound nucleus) cells. The atmosphere at that time was mostly nitrogen gas, with large portions of carbon dioxide and water vapour. Since life evolved in this atmosphere, carbon, oxygen, hydrogen, and nitrogen (major elements of nitrogen gas, carbon dioxide and water) make up 98% of the organic materials in living organisms. There was no oxygen in the early atmosphere, so all life existed in an anaerobic environment. Since no human was alive to document the events of the early earth, much of our information has been pieced together from studies of the fossil record. It is now believed that the earth 4.0 billion years ago was a very tumultuous place; there were violent electrical storms, radioactive substances emitting large quantities of energy, and molten rock and boiling water erupting from beneath the earth’s surface. These forces broke apart the simple gases in the atmosphere, causing them to reorganize into more complex molecules. Ultraviolet light bombarded the surface of the earth, breaking apart the complex molecules and forming new ones. These complex compounds were washed out of the atmosphere by driving rains and subsequently collected in the oceans. Many organic molecules tend to clump together, so the early oceans probably had aggregations of organic molecules that looked like droplets of oil in water. These clusters of molecules may have been the ancestors of primitive cells. They may also have been the source of energy for early life forms; primitive cells could have used these complex compounds to satisfy their energy requirements.

The Elasticity of Business Ethics

Running head: The Elasticity of Business Ethics The Elasticity of Business Ethics Abstract Given the competitiveness in the world market, many are tempted to go outside of the rules and regulations of society in order to get ahead. Although many would like to think that qualities such as honesty and credibility are first and foremost in the minds of people, temptations have lured some to act irresponsibly to get more of the almighty dollar. Recent scandals have proven that good ethical and moral values are becoming more the exception rather than the rule. This paper will address the following ethical and moral questions: What is ethics and morality in business. How far have we come as a country in relation to business ethics? Why society is becoming more aware of corporate behavior? What measures are taken by businesses to become a better corporate citizen? Business practices came under fire when America's seventh largest firm, Enron, collapsed due to unethical accounting strategies. I feel this created a domino effect and was the beginning of our current crisis. Now there are companies folding one after the other, large organizations in the US collapsed or filed for bankruptcy cover and one case even implicated the famous home economist, Martha Stewart for insider trading. The various deceitful activities of some larger companies resulted in widespread public mistrust of business practices and principles. This paper will concentrate on some of the ethical and moral issues that must be addressed when trying to understand the state business ethics. 1. What is ethics and morality and how do they relate? 2. What happened in business ethics before the 1960s to the present time? . What are factors that could change ones views of a business’ ethical behavior? 4. What are interactions between business and society that alter societal expectations? What is ethics and morality and how they relate? When considering the difference between ethics and morals, consider what a criminal defense lawyer does for a client. Though the lawyer’s perso nal moral code likely finds murder immoral and reprehensible, ethics demand the accused be defended to the best of his ability even when the lawyer knows the party is guilty and that a freed defendant would potentially lead to more crime. Legal ethics must override personal morals for the greater good of upholding our justice system in which the accused are given a fair trial and the prosecution must prove the accused guilt. Ethics is the branch of philosophy that deals with morality. Ethics is concerned with distinguishing between the good and evil in the world, between right and wrong human actions, and between virtuous and nonvirtuous characteristics of people. Ethics means thinking critically about your actions and about their motives and their consequences (Dictionary. com, 2009). Do I want to be an honest, honorable, spiritual, respectful, or loving person? You might hold an ethical position that it's wrong to lie. A time may arise where it may be necessary to bend the truth or sometimes tell a â€Å"white lie†. For example, if you have plans to deploy to Iraq on a sensitive mission and you want to keep your trip a secret for obvious reasons. If someone asks you about those plans, you may need to lie to protect the integrity of the mission. When it comes to making ethical decisions, I take into account my very personal feeling that there is a principle greater than myself. With that said, morality is the subset of ethics dealing in the philosophical study of interpersonal relations and their ethical implications. It has to do with the critical analysis of our roles in society, our â€Å"duties† and â€Å"rights†. Morals are not personal decisions, except in whether you agree with them or not. Morals are rules that a group has decided are best for that group. (Borade, G, 2009). Americans have several versions of what is moral and immoral, Catholics have lists of sins, Christians have the Ten Commandments, Buddhists has a set and so forth. You may strongly agree with them, or trongly oppose them, but they still exist, and people will judge your conduct against them whether you agreed with them or not. Building on these definitions, we can begin to develop a concept of business ethics. Business ethics can be defined as written and unwritten codes of principles and values that govern decisions and actions within a company (Simpson, C, 2004). Business ethics boils down to knowing the difference between right and wrong and choosing to do what is right. The phrase ‘business ethics' can be used to describe the actions of individuals within an organization, as well as the organization as a whole (Lovetoknow. om, 2009). What happened in business ethics before the 1960s to the present time? Now that we have defined terms, we can now discuss the progression of business ethics in the United States over the years. The study of ethics in North America has evolved through five distinct stages: (1) Before 1960, (2) the 1960s, (3) the 1970s, (4) the 1980’s and 1990s to present (Ferrell, 2008). Business Ethics Prior to 1960 Prior to 1960, the United States questioned the concept of capitalism. The 1920s brought about the ‘living wage’ through the progressive movement. In the 1930s came the New Deal, which blamed business for the country’s economic woes and businesses where asked to work more closely with government to raise family income. By the 1950s, the New Deal evolved into the Fair Deal by President Truman which addressed civil rights and environmental responsibility as ethical issues that businesses had to address. Until 1960, ethical related issues were addressed in religious institutions of all faiths. Religious leaders raised questions about fair wages, labor practices, and the morality of capitalism. Religion applied its moral concepts to business as well as government, politics, the family, personal life, and all other aspects of life (Ferrell, 2008). Business Ethics in the 1960s During the 1960s, the antibusiness attitude emerged as critics attacked the vested interests that controlled the economic and political side of society, the so called military-industrial complex. The 1960 saw the crumbling of the inner cities and the growth of environmental problems such as toxic and nuclear pollution and waste disposal. A rise in consumerism by individuals, groups, and organizations began to protect their rights as consumers. In 1962, President John F. Kennedy delivered a â€Å"Special Message on Protecting the Consumer Interest† where he outlined the four basic consumer rights: the right to safety, the right to be informed, the right to choose, and the right to be heard. These four rights later came to be known as the Consumers’ Bill of Rights. After Kennedy came Lyndon Johnson and the Great Society, which extended national capitalism and let the business community know that the government would be responsible for providing the citizens with a degree of economic stability, equality, and social justice. Any business practice that could destabilize the economy or discriminate any class of citizen began to be viewed as unethical and unlawful (Ferrell, 2008). Business Ethics in the 1970s In the 1970, business ethics developed as a field of study. Business professors began to teach and write about corporate social responsibility. Companies became more concerned with their public images and realized that they had to address ethical issues more directly. The Nixon Administration’s Watergate scandal brought attention to the importance of an ethical government. The Foreign Corrupt Act was passed during the Carter administration, making it illegal to for U. S. businesses to bribe government officials of other countries. Numerous ethical issues emerged during the late 1970s such as bribery, deceptive advertising, product safety, and the environment issues. Business ethics became a common expression and researchers sought to identify ethical issues and describe how businesspeople might act in a situation (Ferrell, 2008). Business Ethics in the 1980s In the 1980s, business ethics is acknowledged as a field of study. Five hundred courses in business ethics were offered at colleges across the country. Leading companies such as General Electric, Chase Manhattan, General Motors, Atlantic Richfield, Caterpillar, and S. C. Johnson and Son, Inc viewed business ethics as a major concern. The Defense Industry Initiative on Business Ethics and Conduct (DII) was developed to guide corporate support for ethical conduct. The DII established a method for discussing best practices and tactics to link organizational practices and policy to successful ethical compliance. In the 1980s, the Reagan-Bush eras brought about the policy of self-regulation rather than regulation by government. Tariffs and trade barriers were lifted and businesses merged. Corporations that were once nationally bases began operating internationally. The rules of business were changing at an alarming rate due to fewer government regulation imposed during the Reagan-Bush era (Ferrell, 2008). Business Ethics in the 1990s In the 1990s, President Clinton continued to support self-regulation and free trade. However, it also took unprecedented government action to deal with health issues. These issues included restricting cigarette advertising, banning vending machine sales and banning the use cigarette logos during sporting events. The Federal Sentencing Guidelines for Organization (FSGO) was established by Congress and set the tone for organizational ethnical compliance programs in the 1990s. FSGO broke new ground by rewarding and penalizing companies for their ethical compliance programs. Even though the FSGO has made enormous strides it will not be enough to prevent serious penalties. Companies must develop cooperate values, enforce its own code of ethics, and strive to prevent ethical misconduct (Ferrell, 2008). Business Ethics in the 21st century Although business ethics in the 1990s appeared to be an institutionalized concept, evidence emerged in the 2000s that business executives and managers had not fully embraced the public desire for high ethical standards. One such executive, Dennis Kozlowski, former CEO of Tyco, was indicted on thirty-eight counts of embezzling $170 million of Tyco funds and netting $430 million from improper sales of stock. Author Anderson, a â€Å"Big Five† accounting firm, was convicted of obstruction-of-justice conviction for shredding documents related to its role as Enron’s auditor. The reputation of the firm was destroyed and lost all their clients and eventually went out of business. Author Anderson was also questioned for their involvement in audits involving Halliburton, WorldCom, Global Crossing, Dynegy, Qwest, and Sunbeam for their questionable accounting practices. These examples of misconduct increased public demand for improved standards in business. In 2002, Congress passed the Sarbanes-Oxley Act, which made securities fraud a criminal offense and strengthened penalties for corporate fraud. It created an accounting oversight board for greater transparency in financial reports to investors and other interested parties. Top executives are required to sign off on their firms’ financial reports. Company executives must now disclose stock sales immediately and prohibits companies from giving loans to top managers. The Sarbanes-Oxley Act and the FSGO have institutionalized the need for top manager to discover and address ethical and legal risk. Business leaders should view that ethical misconduct as the greatest danger to their companies. Ethical disasters can be damaging to company’s reputation and will significantly have an effect on their bottom line (Ferrell, 2008). What are factors that could change ones views of a business’ ethical behavior? In today’s uncertain business environment, traumatized by countless corporate scandals has brought a lot of attention to the social and ethical practices of business. The highly televised, Enron scandal was exposed when the company filed for bankruptcy. The degree of fraud impacting investors, employees, and others became known to the public. Business criticism is more prevalent than ever because people are more affluent, educated, and better inform because of the access to information. Twenty-four hour news coverage, investigative news programs, the internet, the revolution of rising entitlement mentality, the rights movement, and a philosophy of victimization. Businesses now, more than ever, must realize that there is a more informed society and businesses are being watched (Buchholtz, 2009). What interactions between business and society alter societal expectations? Business is increasingly held to greater standards of social performance, reflecting an imbalance between its traditional conduct and the expectations of society. A corporation commitment to its social responsibilities will go a long way to shape societal approval. There are four levels commitment in social responsibilities. First and foremost, economically, businesses strive to make a profit, maximize stakeholder wealth and value, create jobs for the community, and create goods and services to the economy. Legally abide by all laws and government regulations. Ethically, follow standards of ethical of acceptable behavior as judged by stakeholders or any one other interested party. Finally, philanthropic responsibilities refer to activities not required of business but promote human welfare or goodwill. In my opinion, this level of commitment has the greatest impact on society’s view of a company (Ferrell, 2008). The uses of these levels of responsibilities are attempts by businesses to meet societal expectations and become a better corporate citizen. In conclusion, understanding the meaning of ethics and morality and how they relate is important when trying to understand why people act or react in a given situation. Knowing how business ethics has evolved over the years and how far we still must go to create a happy median between business and society.. As technology becomes more available, society is more aware of corporate social responsibility. With this information, consumers are better able to make informed discussions on which companies to do businesses with. Finally, economic, legal, ethical, and philanthropic interactions between business and society will alter societal expectations of a business good or bad. References Buchholtz, C. (2009). Business and Society: Ethics and Stakeholder Management. (7th Edittion ed. , pp. 3-7). International: South-Western. Ferrell, F. F. (2008). Business Ethics: Ethical Decision Making and Cases. (7th Edition ed. , pp. 11-14). Boston, New York: Houghton Mifflin Company. Simpson, C. (2004, October). Should I or Shouldn’t I? An Ethical Conundrum. Retrieved September 23, 2009, from http://ebscohost. com: http://search. ebscohost. com/login. aspx? direct=true&db=lfh&AN=14597954&site=ehost-live Dictionary. com. (2009). Retrieved September 3, 2009, from Dictionary. com: http://dictionary. reference. com LoveToKnow. com. (2009). Retrieved September 3, 2009, from LoveToKnow. com: http://business. lovetoknow. com/wiki/A_Definition_for_Business_Ethics Borade, G. (2009, March 24). Difference between Ethics and Morality. Retrieved September 22, 2009, from buzzle. com: http://www. buzzle. com/articles/difference- ethics-and-morality. html

Poland Business Cycle

This Country Focus analyses and interprets the statistical characteristics of the Polish business cycle. It also identifies leading and lagging variables and shows that the economic fluctuations in Poland differ to some extent from those in other emerging and mature economies, with Polish growth notably more volatile and government expenditure highly erratic. The available data on GDP growth suggest that the Polish economy is approaching the peak of the second business cycle since the start of economic transformation from a centrally planned to a market economy.The current upswing is to some extent similar to the one of 1995-1997 which ended in large macroeconomic imbalances (increasing unemployment, spare capacity, widening fiscal and current account deficits). However, Poland now appears to be better positioned than after the last cycle and should be able to avoid a repeat of that outcome. Business cycles in emerging market economies Although the economic literature on business cyc les is vast, only recently have some papers on business cycles in emerging market economies appeared.Usually they analyse economic fluctuations within particular countries (e. g. Benczur and Ratfai, 2005) or make some cross-country comparisons (e. g. Aguayo et al. , 2004 or Carmignani, 2005). A common methodology used in the analysis of business cycles (based on observations of mature economies and economic theory) distinguishes pro-cyclical, counter-cyclical and a-cyclical variables. Pro-cyclical variables fluctuate together with GDP (e. g. industrial production, investment, employment, inflation), countercyclical variables against GDP (e. g. nemployment, net exports) and a-cyclical variables independently of GDP (e. g. real interest rates). 1 With respect to timing, the ‘stylised facts' of the business cycle identify leading, lagging and coincident variables: leading variables move ahead of GDP (e. g. average labour productivity, inventory investment, money supply), lagging variables follow GDP (e. g. inflation, nominal interest rates) and coincident variables, as the name suggests, move coincidentally with GDP (e. g. industrial production, consumption, employment) (Snowdon & Vane, 2005, p. 306).Overall, business cycles in emerging market economies (Carmignani, 2005)2 are not much different from those in mature economies (Snowdon and Vane, 2005, p. 306), By Michal Narozny* The business cycle in Poland: where do we stand? Highlights in this issue: †¢ While on the whole not different from mature economies, the properties of the business cycle in Poland display some special characteristics †¢ The current cycle seems to have reached a peak but the slowdown is likely not to be as pronounced as in the previous cycle Volume IV, Issue 9 03. 08. 2007 ECFIN COUNTRY FOCUS Directorate for the Economies of the Member States. The views expressed in the ECFIN Country Focus belong to the authors only and do not necessarily correspond to those of the Director ate-General for Economic and Financial Affairs or the European Commission.Economic analysis from the European Commission’s Directorate-General for Economic and Financial Affairs Identification of direction and timing is key in business cycle analysis ECFIN Country Focus Volume IV, Issue 9 Page 2 but economies in transition (though they do not constitute a homogeneous group) display some specific characteristics: overall, the economy is much more volatile than in the euro area, which is the consequence of structural changes and catching-up, †¢ shocks are slightly less persistent than in the euro area, and fluctuations consequently more frequent, †¢ government consumption is more erratic than in the euro area, suggesting a significant discretionary element in fiscal policies, but not one that is necessarily aimed at cyclical stabilisation, †¢ employment is a-cyclical in some, but pro-cyclical in other emerging economies, †¢ inflation in emerging economies is volatile and not clearly pro-cyclical.Table 1 shows some tentative analysis of the key macroeconomic variables in the Polish business cycle. All variables (except for inflation and net exports) were logtransformed, de-seasonalised by means of the X. 12 method and later de-trended using the HP filter. Net exports were expressed as a ratio to GDP and deseasonalised by means of the multiplicative X. 11 method before being de-trended. Volatility of cyclical fluctuations, and hence the magnitude of the business cycle, is measured by the standard deviation. Polish GDP volatility is about 0. 015, compared to 0. 08 for the euro area. The persistence of cyclical fluctuations is measured by the auto-correlation coefficient: the closer to 1, the more persistent the shock (and the longer it takes to absorb it) and therefore the less fluctuation in the business cycle. Testing for the Polish business cycle persistence yields a coefficient of 0. 55 compared to 0. 85 for the euro area. Table 1. Su mmary statistics of business cycle fluctuations in Poland Correlations with the cyclical component of GDP Poland Standard Autodeviation correlation -4 -3 -2 -1 0 1 2 3 4 GDP 0. 015 0. 550 1Industrial production 3. 317 0. 730 -0. 018 0. 154 0. 314 0. 515 0. 771 0. 599 0. 444 0. 229 0. 113 Private consumption 0. 013 0. 269 0. 015 0. 079 0. 283 0. 433 0. 434 0. 385 0. 463 0. 380 0. 037 Government consumption 0. 020 0. 001 -0. 200 0. 007 0. 230 0. 022 -0. 211 0. 175 0. 282 0. 199 0. 051 GFCF 0. 070 0. 717 0. 357 0. 399 0. 403 0. 484 0. 824 0. 585 0. 371 0. 313 0. 344 Inventories 1. 189 -0. 072 -0. 139 0. 044 0. 021 0. 074 0. 199 0. 187 0. 150 0. 177 0. 230 Net exports 0. 012 0. 574 -0. 061 -0. 174 -0. 386 -0. 373 -0. 326 -0. 513 -0. 497 -0. 389 -0. 452 Exports 0. 58 -0. 005 0. 098 0. 199 0. 177 0. 225 0. 594 -0. 018 0. 030 -0. 016 -0. 193 Imports 0. 063 0. 378 0. 097 0. 252 0. 350 0. 408 0. 672 0. 377 0. 384 0. 258 0. 175 Employment 0. 017 0. 857 0. 291 0. 372 0. 411 0. 452 0. 545 0. 40 9 0. 333 0. 355 0. 344 Labour productivity 0. 354 0. 512 0. 120 0. 090 0. 056 0. 070 0. 133 0. 257 0. 109 0. 026 -0. 142 Money supply (M1) 0. 041 0. 776 -0. 078 -0. 060 0. 092 0. 260 0. 475 0. 472 0. 535 0. 505 0. 432 Inflation 1. 819 0. 779 0. 092 0. 321 0. 511 0. 596 0. 473 0. 290 0. 082 -0. 082 -0. 146 CPI 1. 737 0. 777 0. 086 0. 255 0. 411 0. 422 0. 00 0. 082 -0. 075 -0. 167 -0. 184 Real interest rate 0. 655 0. 942 0. 226 0. 279 0. 302 0. 263 0. 135 0. 132 0. 120 0. 092 0. 088 Source: Own estimates. Data source: Eurostat. Sample: 1995Q3 – 2007Q1 Summary statistics Lags Leads Business cycles in Poland – what is different and what is alike The analysis of the Polish cycle yields a number stylised facts, which are to some degree typical for emerging economies. Table 2 summarises a number of stylised facts on business cycles in mature economies and in Poland (bearing in mind the relatively short time span for the latter).It shows that some of the usual characteristics of business cycles in mature economies (or even in emerging economies) are not seen in Poland. Where this is the case, some interpretation is offered. Industrial production is usually pro-cyclical and coincident in both mature and emerging economies, but in Poland it has a slightly leading property, which indicates the importance of industrial production as a driver of the business cycle. In the aggregate demand components, private consumption seems to be procyclical in Poland.However, it is not coincident as in mature economies, and has a lead-lag profile that is not typical: it is almost flat over four quarters with some lead. Hence, although private consumption is the largest component of GDP, the dynamic relation over time between the two variables is erratic, possibly indicating consumption smoothing, which is characteristic of low-income economies. However, the ratio of the standard deviation of private consumption to the standard deviation of GDP (by which consumption smoothi ng is usually judged) is estimated at 0. 8, i. e. higher than the upper bound of the normal range reported in the literature. 3 This suggests that consumption smoothing is not present in Poland, which might indicate lower risk aversion and/or underdevelopment of financial markets. The Polish business cycle displays some characteristic properties Business fluctuations in Poland are highly volatile and persistent ECFIN Country Focus Volume IV, Issue 9 Page 3 Table 2. The ‘stylised facts' about business cycles in mature economies and Poland Variable Mature economies* Poland** category VariableDirection Timing Direction Timing Supply side Industrial production pro-cyclical coincident pro-cyclical coincident/leading Private consumption pro-cyclical coincident pro-cyclical erratic Government consumption pro-cyclical erratic counter-cyclical /erratic erratic GFCF pro-cyclical coincident pro-cyclical coincident Inventories pro-cyclical leading pro-cyclical leading Net exports counter- cyclical coincident/ lagging counter-cyclical erratic Exports pro-cyclical coincident pro-cyclical coincident Demand components Imports pro-cyclical coincident pro-cyclical coincidentLabour Employment pro-cyclical coincident pro-cyclical coincident/lagging market Labour productivity pro-cyclical leading pro-cyclical leading Money supply pro-cyclical leading pro-cyclical leading Monetary Inflation pro-cyclical lagging pro-cyclical lagging variables Real Interest rates a-cyclical erratic pro-cyclical lagging * Features commonly found in the literature. Main source: Snowdon ; Vane (2005) ** See Table 1 Source: Own calculations (see Table 1) and Snowdon ; Vane (2005) Government consumption seems to be neither systematically counter- nor procyclical.High volatility and a very low persistence (i. e. frequent fluctuations of sizeable magnitude) point to an irregular pattern of government consumption, suggesting an important role of discretionary fiscal policies, which is a distinctive feat ure of emerging economies (Carmignani, 2005) and possibly related to the existence of a political cycle in public finances. Gross fixed capital formation appears to be coincident, highly pro-cyclical and persistent (auto-correlation of 0. 2) and inventories behave according to the ‘stylised facts': they are pro-cyclical and leading (though less so than in mature economies). Finally, both exports and imports can be seen as pro-cyclical, but imports slightly more so than exports, which is in line with the features of mature, but not emerging economies where exports are a-cyclical on average. Moreover, imports seem to be quite persistent (following persistent GFCF), unlike exports (which depend on external demand); both variables are highly volatile (standard deviations are more than the double of the euro-area).Net exports are moderately counter-cyclical with an erratic pattern over time (due to persistent imports), whereas in mature economies net exports are also counter-cyclic al, but usually coincident or lagging. With respect to the labour market, employment shows up as pro-cyclical and coincident, with some evidence of lagging, which places Poland somewhere in the middle between mature and emerging economies in this respect. Labour productivity appears to be pro-cyclical and leading, in line with the ‘stylised facts', though the leading property is less pronounced than in mature economies.Pro-cyclicality of employment with its smooth and slightly lagged correlation profile suggests labour hoarding (Burnside et al. , 1993). Among the monetary variables, the money supply apears to be pro-cyclical and leading. Inflation seems to be pro-cyclical and to follow GDP as in mature economies, which is not the case in most emerging economies (where inflation is acyclical – see Carmignani, 2005). This is probably due to the fact that at the beginning of the transformation process all emerging economies had very high inflation rates that systematically decreased.Thus, it is hard to discern a clear cyclical pattern. Poland managed to achieve relatively low inflation sooner than other emerging countries, allowing this pro-cyclicality to be revealed earlier. Contrary to the ‘stylised facts' for mature (but also emerging) economies, where real interest rates are a-cyclical with no clear pattern with respect to timing, real interest rates in Poland show up as being pro-cyclical and lagging, implying a countercyclical monetary policy (coefficient of correlation with GDP is 0. 4 and there is a clear lagging pattern). Smooth and lagged correlation profile of pro-cyclical employment suggests labour hoarding The irregular pattern of government consumption suggests that discretionary fiscal policies play an important role ECFIN Country Focus Volume IV, Issue 9 Page 4 Troughs, peaks and the drivers of growth The first economic cycle since the beginning of economic transition lasted about 10 years, with the expansion and slowdown phases each spanning about 5 years; the cycle ended in the second quarter of 2001.The current upswing has already lasted 6 years, which suggests that the peak is imminent if the length of the current cycle is similar to the previous one. Decelerating leading variables (industrial production, net exports and labour productivity) may also be signs of a turning point. Chart 1. Developments of basic economic variables in Poland in 1991-2008 -10 -8 -6 -4 -2 0 2 4 6 8 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 % 0 5 10 15 20 25 30 35 % CA deficit (% of GDP) Unemployment rate (rhs) CPI inflation (rhs) GDP growth Fiscal deficit (lhs)Source: Commission services In both the early 1990s and in 2001, when the economy was at its trough, there was a large unutilised labour supply and substantial reserves in enterprises’ capacity utilisation. The fiscal deficit was also substantial. In the first cycle, ample supply of resources was a consequence of t ransition to a market economy which caused a recession in 1990-1991. In 2001-2002 it followed from the world economic slowdown and a restrictive monetary policy, which forced Polish enterprises to reorganise to raise their competitiveness and efficiency. Poland got out of the trough twice hanks to exogenous impulses to investment: the restructuring of the London Club debt in 1994 (which brought the first major wave of FDI) and entry into the EU in 2004 (which led to an inflow of EU funds). The external circumstances were also favourable as the world economy expanded in the nineties until 1998 and has been on a stable growth path since 2003. Chart 2. Contributions to GDP growth in Poland in 1991-2008 -8 -6 -4 -2 0 2 4 6 8 10 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 % total consumption GFCF Inventories Net exports GDP growthSource: Commission services The main factor that drove real GDP growth in 1995-1997 to about 7% was dynamic domest ic demand growth of 8? % on average, supported by robust consumption (about 5 percentage points contribution to GDP growth on average). Despite the fact that the economy was growing above potential and domestic demand was growing significantly faster than GDP, a strong zloty appreciation (with a temporary blip in 2000) ensured that the disinflation process was not disturbed. However, this There are indications that the Polish business cycle has approached a peak Large acroeconomic imbalance during the troughs ECFIN Country Focus Volume IV, Issue 9 Page 5 situation led to a fast-growing imbalance on the current account: the 2% of GDP surplus in 1994 fell to a deficit of 6% of GDP in 1999 (to which the Russian crisis also contributed). Growth outlook based on solid foundations for now It is estimated that the Polish economy is currently expanding at a pace close to its potential (approximated at 5. 9% in 2007), on the back of rising domestic demand, which is likely to be followed by i ncreasing imports and a deteriorating current account balance.The growth of gross fixed capital formation accelerated to 17% in 2006 and to nearly 30% y-o-y in the first quarter of 2007. Private consumption increased at 5. 2% in 2006 and stepped up to 6. 9% y-o-y in the first quarter of 2007, which is significantly higher than the 2. 7% average growth in 2000-2003. So far, this expansion of consumption has not led to a rapid increase in the current account deficit (which rose from 1. 7% in 2005 to 2. 3% of GDP in 2006) or a rise in inflation (which has come in below the central bank's medium-term inflation target of 2. % for eight quarters in a row), mainly thanks to moderate real wage growth. However, with a tightening labour market, emerging skill mismatches and workforce emigration the pressure on wages is expected to become more significant, contributing to a further increase of consumption. In consequence, it might lead to an escalation of the external imbalance and/or increase d inflation. Nevertheless, GDP growth in the current phase seems to be based on more solid foundations than in the late 1990s: †¢ Firstly, the share of exports in GDP has nearly tripled in 1992-2006 to about 40%; the number of exporters has also increased considerably.The structure of exports has improved, with a bigger share of processed goods and a higher value added. Foreign direct investment has helped increase the production capacity of the Polish economy, which enables the domestic market to better meet increased private demand, and makes the balance of payments less prone to fluctuations in domestic demand. In addition, increased investment-driven imports are largely balanced by increased exports on account of a good situation in the external environment. †¢ Secondly, the floating exchange rate is likely to act as a buffer against imported inflation.However, even without a strong zloty appreciation, inflation in Poland during the coming years is expected to stay rel atively low: below or around the central bank's medium-term inflation target of 2. 5%. As the Polish economy is now more open than 10 years ago, inflation is more influenced by global factors. Increased exposure of Polish enterprises to international competition limits their ability to freely increase prices and wages. They are forced to increase labour productivity faster than wages to maintain their market position. Thus, even with growing wage demands, enterprises are more willing to decrease mark-ups than to raise prices. Thirdly, increased household incomes acquired as a result of higher wages and an improved labour market situation may not translate into consumption to the same extent as in the previous economic cycle. There is evidence that households are now more saturated with basic durable and consumption goods which they lacked before4 and are more eager to spend additional income on holidays abroad owing to a more mature service sector. Financial markets are more develop ed than 10 years ago, giving an opportunity for financial investments. ConclusionsThe business cycle in Poland exhibits similar properties to cycles in mature economies, but there are some notable differences for government consumption, net exports and real interest rates (although for the last variable the picture may be blurred by its very high level at the beginning of the transformation process). However, because the data series are short, the results should be interpreted with caution. The irregular behaviour of government consumption in Poland with respect to influence on the business cycle could be related to a discretionary fiscal policy implemented within a political business cycle.GDP growth is based on more solid foundations in the current cycle ECFIN Country Focus Volume IV, Issue 9 Page 6 The analysis of the previous upswing in Poland, the identification of variables with leading properties with respect to GDP, and the latest developments all seem to suggest that the Po lish economy might have reached the peak of the current cycle in the first quarter of 2007. Nevertheless, thanks to the ongoing process of restructuring of the economy, the slowdown phase is not likely to be as pronounced as in the previous cycle and should not lead to major imbalances.